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tmp107-q1 sbos726a ? october 2015 ? revised october 2015 tmp107 -q1 automotive grade, 0.4 c temperature sensor with daisy-chain uart, eeprom, and alert function 1 features 2 applications 1 ? aec-q100 qualified with: ? battery management systems (bmss) ? distributed temperature sensing ? temperature grade 1: ? 40 c to +125 c ambient operating temperature range ? hybrid, electric, and power-train systems ? device hbm esd classification level 2 ? body control modules (bcms) ? device cdm esd classification level c6 ? building automation and hvacs ? high accuracy (without calibration): ? engine control units ? 0.4 c (max) from ? 20 c to +70 c ? infotainment processor management ? 0.55 c (max) from ? 40 c to +100 c ? diesel urea tanks ? 0.7 c (max) from ? 55 c to +125 c 3 description ? high resolution: 14 bits (0.015625 c) the tmp107-q1 digital output temperature sensor ? uart-compatible, smaart wire ? interface: supports a total of 32 daisy-chained devices. each ? allows up to 32 daisy-chained devices sensor has a unique 5-bit address stored in electrically-erasable programmable memory ? eeprom memory for unique addressing, trip (eeprom). the tmp107-q1 is capable of reading level programming, and general-purpose temperatures with a resolution of 0.015625 c, and is storage accurate to within 0.4 c in the range from ? 20 c to ? continuous conversion and shutdown mode for +70 c. the tmp107-q1 is ideal for replacing ntc power savings and ptc thermistors where high accuracy is required. ? one-shot conversion mode for custom update rates and power savings device information (1) device name package body size ? programmable alert feature tmp107-q1 soic (8) 4.90 mm 3.90 mm ? operating temperature range: ? 55 c to +125 c (1) for all available packages, see the package option addendum ? operating supply range: 1.7 v to 5.5 v at the end of the datasheet. ? package: soic-8 typical application all figures shown as tmp107 represent tmp107-q1 as well. 1 an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. gnd v+ i/o1 7 1 i/o2 3 5 sensor 1 r1 alert1 r2 alert2 tmp107 tx rx uart 100 4.1 k 10 1.7 v to 5.5 v 2 6 8 4 v+ gnd 7 13 5 sensor 2 tmp107 2 13 5 sensor n tmp107 2 6 8 4 6 87 4 gnd v+ i/o1 i/o2 r1 alert1 r2 alert2 gnd v+ i/o1 i/o2 r1 alert1 r2 alert2 0.1 f 0.1 f 0.1 f mcu productfolder sample &buy technical documents tools & software support &community
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com table of contents 8.4 device functional modes ........................................ 21 1 features .................................................................. 1 8.5 programming ........................................................... 22 2 applications ........................................................... 1 8.6 register map ........................................................... 23 3 description ............................................................. 1 9 application and implementation ........................ 29 4 revision history ..................................................... 2 9.1 application information ............................................ 29 5 description (continued) ......................................... 3 9.2 typical applications ................................................ 29 6 pin configuration and functions ......................... 4 10 power supply recommendations ..................... 33 7 specifications ......................................................... 5 11 layout ................................................................... 33 7.1 absolute maximum ratings ...................................... 5 11.1 layout guidelines ................................................. 33 7.2 esd ratings .............................................................. 5 11.2 layout example .................................................... 33 7.3 recommended operating conditions ....................... 5 12 device and documentation support ................. 34 7.4 thermal information .................................................. 5 12.1 documentation support ........................................ 34 7.5 electrical characteristics ........................................... 6 12.2 community resources .......................................... 34 7.6 timing requirements ................................................ 7 12.3 trademarks ........................................................... 34 7.7 typical characteristics .............................................. 8 12.4 electrostatic discharge caution ............................ 34 8 detailed description ............................................ 11 12.5 glossary ................................................................ 34 8.1 overview ................................................................. 11 13 mechanical, packaging, and orderable 8.2 functional block diagram ....................................... 11 information ........................................................... 34 8.3 feature description ................................................. 12 4 revision history changes from original (october 2015) to revision a page ? released to production .......................................................................................................................................................... 1 2 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 5 description (continued) the unique 5-bit address stored in the eeprom is determined during the automated address assignment operation, and is based on the position of each sensor relative to the smaart wire host. multiple operating modes provide maximum flexibility in selecting between low power consumption for battery operation, and high update rates for real-time control applications. the tmp107-q1 is ideal for extended temperature measurement in a variety of industrial, instrumentation, communication, and environmental applications. the tmp107-q1 is available in an 8-pin soic package and is specified for operation over a temperature range of ? 55 c to +125 c. copyright ? 2015, texas instruments incorporated submit documentation feedback 3 product folder links: tmp107-q1
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 6 pin configuration and functions d package 8-pin soic top view pin functions pin i/o description no. name 1 v+ ? supply voltage, 1.7 v to 5.5 v 2 r1 i built-in pullup resistor for alert1; float or connect to v+ 3 i/o1 i/o smaart wire input, output 1 4 alert1 o over- and undertemperature alert. open-drain output; internally connected to pullup resistor r1. 5 gnd ? ground 6 alert2 o over- and undertemperature alert. open-drain output; internally connected to pullup resistor r2. 7 i/o2 i/o smaart wire input, output 2 8 r2 i built-in pullup resistor for alert2; float or connect to v+ 4 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1 gnd v+ r1 alert1 i/o1 2 6 87 1 alert2 i/o2 r2 4 3 5
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 7 specifications 7.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit supply voltage, v+ 6 v i/o1, i/o2 ? 0.3 (v+) + 0.3 input voltage r1, r2 ? 0.3 6 v alert1, alert2 ? 0.3 6 sink current alert1, alert2 10 ma operating junction ? 55 150 temperature c storage, t stg ? 60 150 (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions . exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 esd ratings value unit human-body model (hbm), per aec q100-002 (1) 2000 v (esd) electrostatic discharge v charged-device model (cdm), per aec q100-011 1000 (1) aec q100-002 indicates that hbm stressing shall be in accordance with the ansi/esda/jedec js-001 specification. 7.3 recommended operating conditions over operating free-air temperature range (unless otherwise noted) min nom max unit supply voltage, v+ 1.7 3.3 5.5 v operating free-air temperature, t a ? 55 125 c 7.4 thermal information tmp107-q1 thermal metric (1) d (soic) unit 8 pins r ja junction-to-ambient thermal resistance 116.3 c/w r jc(top) junction-to-case (top) thermal resistance 62.5 c/w r jb junction-to-board thermal resistance 56.6 c/w jt junction-to-top characterization parameter 14.6 c/w jb junction-to-board characterization parameter 56.0 c/w r jc(bot) junction-to-case (bottom) thermal resistance n/a c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report, spra953 . copyright ? 2015, texas instruments incorporated submit documentation feedback 5 product folder links: tmp107-q1
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 7.5 electrical characteristics at t a = ? 55 c to 125 c and v+ = +1.7 v to +5.5 v (unless otherwise noted). typical values at t a = 25 c and v+ = 3.3 v. parameter test conditions min typ max unit temperature input temperature range ? 55 125 c temperature resolution 0.015625 c ? 20 c to +70 c; one-shot mode, bus inactive 0.125 0.4 ? 40 c to +100 c; one-shot mode, bus 0.125 0.55 temperature accuracy (error) inactive c ? 55 c to +125 c; one-shot mode, bus 0.5 0.7 inactive adc resolution 14 bits digital output (alert1, alert2) v ol low-level output voltage i out = ? 1 ma 0 0.02 0.4 v high-level output leakage i oh v o = v+ 0.1 1 a current r pu pullup resistors 75 100 125 k digital input/output (i/o1, i/o2) v ih high-level input voltage 0.7 (v+) (v+) + 0.3 v v il low-level input voltage ? 0.3 0.3 (v+) v i in input current 0 v < v in < (v+) + 0.3 v ? 1 1 a v ol low-level output voltage i out = ? 1 ma 0 0.1 0.4 v v oh high-level output voltage i out = 1 ma (v+) ? 0.4 (v+) ? 0.1 v+ v short-circuit i/o1 and i/o2 to ground or v+, short-circuit current 60 ma v+ = 5 v device timing conversion time one-shot mode 12 15 18 ms conversion rate programmable 1/16 62 conv/s any communication 35 40 ms device timeout time global address-initialize command 1 1.25 s eeprom programming time v+ > 1.8 v 7 ms number of writes v+ > 1.8 v 1000 100,000 times data retention time 10 years power supply 1.7 3.3 5.5 v v+ operating supply range eeprom write 1.8 3.3 5.5 v adc conversion on, 200 400 smaart wire bus inactive adc conversion on, smaart wire bus active 300 (bus baud rate = 57.6 kbd) i q quiescent current adc conversion off, smaart wire bus active a 100 (bus baud rate = 57.6 kbd) 1 conversion per second average, 16 35 smaart wire bus inactive eeprom write (adc conversion off) 400 i sd shutdown current smaart wire bus inactive (i/o1, i/o2 = v+) 3.8 10 a power-on reset voltage supply voltage rising 1.4 v 6 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 7.6 timing requirements min nom max unit from host to the tmp107-q1 1/t baud smaart bus baud rate 4.8 115.4 kbd t rise + t jitter smaart bus transition from low to high + edge timing variance 15 % of (1/baud) t fall + t jitter smaart bus transition from high to low + edge timing variance 15 % of (1/baud) from the tmp107-q1 to host or next tmp107-q1 in daisy-chain t jitter edge timing variance 1 s t skew average phase shift between io1 and io2 33 ns t rise smaart bus transition from low to high, 10-pf load 10 ns t fall smaart bus transition from high to low, 10-pf load 10 ns figure 1. timing diagram copyright ? 2015, texas instruments incorporated submit documentation feedback 7 product folder links: tmp107-q1 v ih v il t rise t jitter t jitter t skew t skew t baud t baud t fall from host to tmp107 from tmp107 to host or from tmp107 to next tmp107 in daisy-chain t jitter t jitter t rise t fall v ih v il
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 7.7 typical characteristics at t a = 25 c and v+ = 3.3 v (unless otherwise noted) one-shot mode, specified from ? 55 o c to +125 o c only one-shot mode, v+ = 5.5 v, specified from ? 55 o c to +125 o c only figure 2. temperature error vs temperature figure 3. temperature error vs temperature one-shot mode, v+ = 1.7 v, specified from ? 55 o c to +125 o c only figure 5. temperature error histogram figure 4. temperature error vs temperature continuous-conversion mode, maximum conversion rate, bus inactive one-shot mode, v+ = 1.7 v to 5.5 v figure 7. temperature error vs temperature figure 6. power-supply rejection histogram 8 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1 psr ( q c/v) population 0 100 200 300 400 500 600 700 800 -0.016 -0.011 -0.007 -0.002 0.001 0.005 0.01 0.015 0.019 0.024 0.028 0.033 temperature ( q c) temperature error ( q c) -70 -45 -20 5 30 55 80 105 125 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 mean - 3 v mean mean + 3 v temperature error at 25 q c population 0 50 100 150 200 250 300 -0.232 -0.191 -0.149 -0.108 -0.067 -0.025 0.016 0.057 0.099 0.14 0.181 temperature ( q c) temperature error ( q c) -70 -45 -20 5 30 55 80 105 125 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 mean 3 v mean mean + 3 v temperature ( q c) temperature error ( q c) -70 -45 -20 5 30 55 80 105 125 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 mean 3 v mean mean + 3 v temperature ( q c) temperature error ( q c) -70 -45 -20 5 30 55 80 105 125 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 mean 3 v mean mean + 3 v
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 typical characteristics (continued) at t a = 25 c and v+ = 3.3 v (unless otherwise noted) one-shot mode no bus communication figure 8. temperature error vs power supply voltage figure 9. continuous-conversion current vs temperature shutdown mode figure 10. shutdown current vs temperature figure 11. quiescent current vs smaart wire bus speed 1 conversion per second figure 13. eeprom programming (write) current figure 12. average quiescent current vs temperature vs power supply voltage copyright ? 2015, texas instruments incorporated submit documentation feedback 9 product folder links: tmp107-q1 temperature ( q c) average quiescient current ( p a) -55 -40 -25 -10 5 20 35 50 65 80 95 110 125 0 5 10 15 20 25 30 5.5 v 3.3 v 1.7 v power supply voltage (v) eeprom programming current ( p a) 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 250 275 300 325 350 375 400 425 450 475 500 +125c +25c 40c temperature ( q c) shutdown current ( p a) -55 -40 -25 -10 5 20 35 50 65 80 95 110 125 0 1 2 3 4 5 6 7 8 5.5 v 3.3 v 1.7 v bus speed (kbaud) quiescient current ( p a) 0 10 20 30 40 50 60 70 80 90 100 110 120 0 25 50 75 100 125 150 175 200 225 250 5.5 v 4.4 v 3.3 v 2.2 v 1.7 v power supply voltage (v) temperature error ( q c) 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 55 q c 20 q c +25 q c +80 q c +125 q c temperature ( q c) quiescent current ( p a) -55 -40 -25 -10 5 20 35 50 65 80 95 110 125 120 135 150 165 180 195 210 225 240 255 270 285 300 315 330 5.5v 3.3v 1.7v
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com typical characteristics (continued) at t a = 25 c and v+ = 3.3 v (unless otherwise noted) figure 14. sample period drift vs power supply voltage figure 15. alert pin sink current capability 10 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1 power supply voltage (v) sample period drift (%) 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 -1.5 -1 -0.5 0 0.5 1 1.5 2 -55 q c -15 q c +25 q c +75 q c +125 q c alert pin sink current (ma) output voltage (v) 0 5 10 15 20 25 30 35 40 0 1 2 3 4 5 6 v+ = 1.7v v+ = 3.3v v+ = 5.5v
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8 detailed description 8.1 overview the tmp107-q1 is a digital temperature sensor that is optimal for thermal monitoring of large areas over long distances. the robust uart-compatible smaart wire interface transfers data over a single wire at distances of up to 1000 feet (300 meters) between consecutive devices in the chain, and is capable of communicating in a daisy-chained configuration with up to 32 devices on a single bus. the tmp107-q1 supports individual commands to a specific device in the daisy chain, and also supports global commands that allow multiple tmp107-q1s in the chain to respond to a single command. 8.2 functional block diagram note: the temperature sensor of the tmp107-q1 is the silicon chip. thermal paths run through the package leads. the lower thermal resistance of metal enables the leads to provide the primary thermal path. copyright ? 2015, texas instruments incorporated submit documentation feedback 11 product folder links: tmp107-q1 oscillator eeprom power-on reset input/output i/o1 i/o2 alert1 alert2 v+ gnd r1 r2 digital controls temperature sensor alert 100 k 100 k thermal path
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 8.3 feature description 8.3.1 digital temperature output the 14-bit digital output from each temperature measurement conversion is stored in the temperature register. read two bytes to obtain the data. table 1 summarizes the temperature data format. negative numbers are represented in binary twos complement format. the temperature sensor resolution is 0.015625 o c/lsb. table 1. temperature data format digital output temperature ( c) binary hex 127.984 01 1111 1111 1111 1fff 100 01 1001 0000 0000 1900 80 01 0100 0000 1000 1408 75 01 0010 1100 0000 12c0 50 00 1100 1000 0000 c80 25 00 0110 0100 0000 640 0.25 00 0000 0001 0000 10 0 00 0000 0000 0000 0 ? 0.25 11 1111 1111 0000 3ff0 ? 25 11 1001 1100 0000 39c0 ? 55 11 0010 0100 0000 3240 use the following rules to obtain the data for a given temperature, and vice versa. ? to convert positive temperatures to a digital data format : divide the temperature by the resolution. then, convert the result to binary code with a 14-bit, left-justified format. example: (50 c) / (0.015625 c / lsb) = 3200 = c80h = 00 1100 1000 0000 = c80h ? to convert a positive digital data format to temperature : convert the 14-bit, left-justified, binary temperature result to a decimal number. then, multiply the decimal number by the resolution to obtain the positive temperature. example: 00 1100 1000 0000 = c80h = 3200 (0.015625 c / lsb) = 50 c ? to convert negative temperatures to a digital data format : divide the absolute value of the temperature by the resolution and convert the result to binary code with a 14- bit, left-justified format. then, generate the twos complement of the result by complementing the binary number and adding one. example: (| ? 25 c|) / (0.015625 c / lsb) = 1600 = 640h = 00 0110 0100 0000 twos complement format: 11 1001 1011 1111 + 1 = 11 1001 1100 0000 = 39c0h ? to convert a negative digital data format to temperature : generate the twos complement of the 14-bit, left-justified binary number of the temperature result by complementing the binary number and adding one. this number is the binary representation of the absolute value of the temperature. convert to a decimal number and multiply by the resolution to obtain the absolute temperature, then multiply by ? 1 for the negative sign. example: 11 1001 1100 0000 has a twos complement of 00 0110 0011 1111 + 1 = 00 0110 0100 0000 convert to temperature: 00 0110 0100 0000 = 640h = 1600; 1600 (0.015625 c / lsb) = 25 c = (| ? 25 c|); (| ? 25 c|) ( ? 1) = ? 25 c 12 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8.3.2 temperature limits and alert the tmp107-q1 has two alert x pins (alert1 and alert2) for under- and overtemperature monitor functions. both pins have independent, dynamically-programmable limits. at the end of each conversion, the temperature result is compared with the high limit and low limit registers. if the temperature is outside the limit window, the respective alert x pin trips. there are two polarity bits that set the active state of the alert x pin. the tmp107-q1 has two flag bits (fh x and fl x ) for each alert condition to indicate in which direction the temperature has moved outside of the limit window. there are two operating modes used for alerts and flags: therm and alert . in therm mode, the alert x pins and fh x and fl x flags are outputs of a transparent comparator. in alert mode, the alert x pins and fh x and fl x flags are latched interrupts. select between alert mode or therm mode by using the t x / a x (t1/ a1 and t2/ a2) bits in the configuration register . in alert mode (t x / a x = 0, default), the high and low limits form a temperature window. at the end of a conversion, if the temperature result exceeds the high limit or is less than the low limit, the respective flag (either fh x or fl x ) and the alert x pin are asserted. if the alert outputs of multiple tmp107-q1s are connected together, the tmp107-q1 tripped alerts are still identifiable. to clear the alert x pin, issue a global alert clear x command, or read the configuration register as shown in figure 16 . to clear the fh x or fl x flag, read the configuration register. alert-mode operation is shown in figure 16 . figure 16. alert x pin behavior in alert mode (pol x = 0) copyright ? 2015, texas instruments incorporated submit documentation feedback 13 product folder links: tmp107-q1 temperature high limit low limit time measured temperature fh x fl x configuration and temperature register reads alert x pin global alert clear x command
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com in therm mode (t x / a x = 1), the high and low limits are used to form an upper-limit threshold detector. if the temperature result exceeds the high limit, the fh x flag and the alert x pin are asserted. the fh x flag and the alert x pin are then deasserted only after the temperature falls below the low limit. in therm mode, only the fh x flag is active. the fl x flag always reads 0. in therm mode, alert x and the flags are asserted and deasserted only at the end of a conversion and cannot be cleared by a configuration register read or global alert clear x command. figure 17 shows therm-mode operation. figure 17. alert x pin behavior in therm mode (pol x = 0) the limit registers default values are programmed in the eeprom, and are acquired during power up or reset. the values can be dynamically changed by writing to the register. disable alert and flag functionality by programming the high limit register to the highest temperature (7ffch) and the low limit register to the lowest temperature (8000h). when disabled, the alert pins can still be controlled by polarity bits pol1 and pol2 (bit 7 and bit 3, respectively, in the configuration register ) so that they work like general-purpose outputs (gpos). 8.3.2.1 alert1, alert2, r1, and r2 pins alert1 and alert2 are open-drain output pins that require pullup resistors to operate properly. the tmp107- q1 contains internal 100-k pullup resistors connected between pins alert1 and r1, and pins alert2 and r2. to use the internal pullup resistors, connect pins r1 and r2 to v+, or to a voltage suitable for use with pullup resistors in the system. if external pullup resistors are used, float pins r1 and r2. 14 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1 temperature high limit low limit time measured temperature fh x fl x (always 0) configuration and temperature register reads alert x pin global alert clear x command
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8.3.3 smaart wire communication interface the tmp107-q1 uses a ti proprietary, one-wire, uart-compatible, bidirectional, communication protocol called smaart wire. it is a true one-wire communication protocol where the host can communicate with multiple daisy- chained tmp107-q1 devices. the host device can be an off-the-shelf uart transceiver, or a microcontroller in which communication is performed by bit banging of the gpio pins. when bit banging, follow the communication protocol format and specified parameters. all tmp107-q1 devices have the default device addresses set to 0h. after the devices are assembled in a daisy-chain configuration per the application requirements, the host must send the address-initialize command. this command initializes the daisy-chain so that all of the devices in the chain are assigned a unique incremental address respective to their position from the host controller (see the address initialize section for more information). the generated device addresses are stored in the internal eeprom memory of each tmp107-q1 in the chain. after the address initialization process is completed, the tmp107-q1 devices restore their addresses from their respective eeprom memories upon reset events. after the daisy-chain is initialized with the address-initialize command operation, the host device can perform individual read and write operations to any device in the daisy chain by directly addressing that device. the host can also perform global read, global write, or global software reset operations on all devices in the daisy chain. the inactive state of the bus is logic high. every communication operation in the smaart wire protocol consists of multiple 10-bit words. each word is transferred least significant bit (lsb) first, with a start bit that is logic low in the beginning, a stop bit that is logic high in the end, and 8-bit data located between the start and stop bits. each phase consists of one or more words that are transferred least significant word first. by using a start bit and stop bit for each word, the tmp107-q1 devices can detect the start of every word and maintain synchronous communication. smaart wire protocol communication is divided into two categories: address operations and command operations. address operations are used to perform individual and multiple device read and write operations. command operations are address initialize, last device polling, and global software reset operations. figure 18 shows the top-level phase sequences for the two types of operation. detailed descriptions with timing diagrams are provided. figure 18. address and command operations copyright ? 2015, texas instruments incorporated submit documentation feedback 15 product folder links: tmp107-q1 command and address phase register pointer phase data phase calibration phase command and address phase data phase calibration phase address operation command operation
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 8.3.3.1 communication protocol only the host initiates communication. before communication begins, all the daisy-chained devices are in transparent mode. in this mode, all the host operations are sequentially transferred to all the devices in the chain. the devices in the chain cannot communicate with each other with the exception of the address initialize command . after initialization, the devices in the chain are in one of the following four modes: ? wait for a command from the host (default mode) ? transmit the device data back to the host ? transmit the commands from the host to the subsequent device in the chain ? transmit the data from the subsequent device back to the host 8.3.3.1.1 calibration phase the calibration phase is the first phase of every communication, and consists of the host sending 10-bits, as shown in figure 19 . pull the line low in the beginning to notify each device that the host is initiating communication. next, the host transmits calibration sequence 55h at the desired communication baud rate. the connected devices receive this calibration byte and calculate the baud rate to communicate with the host. this calibration byte is sent at the beginning of every operation; therefore, each address or command operation can be performed at a different baud rate. figure 19. calibration phase 8.3.3.1.2 command and address phase the second phase of every communication is the command and address phase. the values of the bits in this phase determine the format and structure of subsequent phases in the communication operation. table 2 lists the command and address phase values. table 2. command and address phase values command and address phase values command and 0 1 2 3 4 5 6 7 hex value address operations g/ni ac4 (lsb) r/nw c/na ac0 ac1 ac2 ac3 (msb) address initialize 1 0 1 0 1 0 0 1 95 last device poll 1 1 1 0 1 0 1 0 57 global software reset 1 0 1 1 1 0 1 0 5d global alert clear 1 1 0 1 0 1 1 0 1 b5 global alert clear 2 1 0 1 0 1 1 1 0 75 global read 1 1 0 a0 a1 a2 a3 a4 varies based on a0-a4 global write 1 0 0 a0 a1 a2 a3 a4 varies based on a0-a4 individual read 0 1 0 a0 a1 a2 a3 a4 varies based on a0-a4 individual write 0 0 0 a0 a1 a2 a3 a4 varies based on a0-a4 8.3.3.1.2.1 global or individual (g/ni) bit the g/ni bit indicates if the communication is a global operation (intended for more than one device) or individual (intended for only one device). all command operations are global; therefore, for command operations, always set the g/ni bit to 1. for read and write address operations to multiple devices in the daisy chain simultaneously, set this bit to 1. to access an individual device, set the g/ni bit to 0. during global operation, the host sets the address portion of the command to the maximum address required to perform the communication. for example, to perform a write to the high-limit register of all devices between addresses 1h to 5h in the daisy chain, set the g/ni bit to 1 and the address field to 5h. for individual accesses, set the address field to the desired device address. 16 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1 1 0 1 0 1 0 1 0 s p
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8.3.3.1.2.2 read/write (r/nw) bit the r/nw bit indicates whether the operation is read or write to the tmp107-q1 device. 8.3.3.1.2.3 command or address (c/na) bit: the c/na bit indicates whether the current communication is a command operation or address operation. the c/na bit = 1 indicates a command operation. the codes for specific commands in the tmp107-q1 are listed in table 2 . codes other than those listed in table 2 are reserved for factory use only. the c/na bit = 0 indicates an address operation. the five bits following the c/na bit (a4 to a0) are the address bits of the device or devices that the host intends to communicate with in the chain, as shown in figure 20 . figure 20. command and address phase 8.3.3.1.3 register pointer phase the register pointer phase is provided only if the communication is an address operation. this phase of the communication shows the register pointer of the device that the host in going to write to or read from. the pointer byte has special identification code bits, as shown in figure 21 . figure 21. register pointer phase 8.3.3.1.4 data phase the data phase is the last phase of communication. every register location consists of two words of data. therefore, this last phase of communication consists of at least two bytes of data with the least significant byte sent first, followed by the most significant byte. for a write operation, the host sends data to the device or devices at the specified register pointer location. for a read operation, the specified device or devices respond back with the data from the location specified in the register pointer phase. depending on the value of g/ni bit in the command and address phase, the data in this phase are either written to a targeted individual device, or to multiple devices in the daisy-chain. individual and global read or write operations are explained in more detail in subsequent sections. figure 22 shows a diagram of the data phase. figure 22. data phase for an individual read or write scenario copyright ? 2015, texas instruments incorporated submit documentation feedback 17 product folder links: tmp107-q1 s p data byte 2 d8 d9 d10 d11 d12 d13 d14 d15 s p data byte 1 d0 d1 d2 d3 d4 d5 d6 d7 p s p 0 1 0 1 p0 p1 p2 p3 p s p g/ni c/na =1 r/nw c0 c1 c2 c3 c4 p s p g/ni r/nw a0 a1 a2 a3 a4 p c/na =0 command phase address phase
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 8.3.3.2 smaart wire operations this section describes various types of communication operations and is illustrated with timing diagrams. the diagrams in this section are used only to understand functional aspects of the communication; for timing aspects, see the timing requirements table. the color of the phases in figure 23 through figure 29 indicates the direction of the communication. the communication phases marked in black indicate the host controller is driving the bus. the communication phases marked in red indicate one of the devices in the daisy chain is responding to the host by driving the bus. the device communicates to the host controller through intermediate devices. the intermediate devices are automatically configured as buffers to allow data to pass through from the i/o2 pin to the i/o1 pin, and vice versa. 8.3.3.2.1 command operations 8.3.3.2.1.1 address initialize the address-initialize command initializes the addresses of the devices in the daisy chain. this command must be performed one time because the addresses are stored in the devices eeprom and loaded on every reset event. after the address-initialize command phase, the host provides one word of address-assign, command-byte data, as shown in figure 23 . this word contains the desired address of the first device on the daisy chain in the a4:a0 field. although any value from 0 to 31 is allowed for this field, it is recommended to keep first device address at 01h. the last device address must never exceed 31. after the address-assign command bytes have been transmitted by the host, the daisy chain goes through a sequence of position detection and self-programming events where the devices in the chain identify their respective locations on the bus. during this process, the host receives incremental address response data from the individual tmp107-q1 devices in the daisy chain that indicate the point in the chain up to which the address assignment has been completed. these responses arrive at intervals of 7 ms. this procedure is represented in figure 23 . figure 23. address-initialize command until the initialization process is completed, daisy-chain communication is directed toward the host. do not send any new commands to the chain during this period. if the address initialization sequence is interrupted as a result of glitches or disconnects in the daisy chain, the devices stall communication. in the event of a stall, each device has an internal timeout of one second (only for the address-initialize command). after one second, the communication interface in the tmp107-q1 device resets, and the host regains control of the chain. float the i/o2 pin of the last device in the chain. the address initialization procedure occurs serially from one device to the next; therefore, the maximum current consumed by the chain must not exceed the current required to initialize one device. 18 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1 s p calibration byte (55h) command phase 1 1 0 0 1 0 0 1 ac0 ac1 ac2 ac3 ac4 address assign byte a0 a1 a2 a3 a4 g/ni r/nw c/na address response byte from sensor 1 1 1 0 0 1 0 1 0 s p s p 1 0 1 a0 a1 a2 a3 a4 7ms 7 ms s p 1 1 0 address response byte from sensor 2 s p 1 0 1 a0 a1 a2 a3 a4 7ms 7 ms address response byte from sensor n s p 1 0 1 a0 a1 a2 a3 a4 7ms 7 ms
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8.3.3.2.1.2 last device poll when the host issues a last-device-poll command, the last sensor on the initialized daisy chain responds back with the last device address, as shown in figure 24 . the last-device-poll command is also used to check if the daisy-chain address set is intact. if the daisy chain is not intact, the host does not receive a response to the last- device-poll command. this command only works if the last device in the chain was the last device during initialization. for example, if there are ten devices in the chain during address initialization and two devices are removed, running this command does not provide the host with the address of device eight. device eight was not the last device during chain initialization, so it cannot report that device eight is the last device in the chain. in this example, the command is not answered. figure 24. last-device-poll command 8.3.3.2.1.3 global software reset use the global-software-reset command to issue a software reset to the chain in order for the devices to load the power-on reset values from eeprom and clear the temperature result register. this command performs the same function as writing a 1 to rst (bit 1 in the configuration register ). the sequence of this command is shown in figure 25 . figure 25. global software reset command 8.3.3.2.2 address operations 8.3.3.2.2.1 individual write use the individual write operation to write data to a specific register in a specific device in the daisy chain, as shown in figure 26 . figure 26. individual write operation copyright ? 2015, texas instruments incorporated submit documentation feedback 19 product folder links: tmp107-q1 calibration byte (55h) s p 0 0 a0 a1 a2 a3 a4 s p 0 g/ni r/nw c/na command and address phase s p data byte 2 d8 d9 d10 d11 d12 d13 d14 d15 s p data byte 1 d0 d1 d2 d3 d4 d5 d6 d7 register pointer phase 0 1 0 1 p0 p1 p2 p3 p s p 1 0 1 0 1 0 1 0 s p 1 0 1 1 0 1 0 1 g/ni r/nw c/na ac0 ac1 ac2 ac3 ac4 1 0 1 0 1 0 1 0 s p s p 1 1 0 1 0 1 0 1 g/ni r/nw c/na ac0 ac1 ac2 ac3 ac4 s p address response byte from sensor n 1 0 1 a0 a1 a2 a3 a4 s p 1 0 0 1 0 1 0 1
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 8.3.3.2.2.2 individual read use the individual read operation to read the value of a register in a single device in the daisy chain, as shown in figure 27 . there is delay of up to 1.5 baud before the device responds back to the host. the host reads the data from the device by synchronizing to the falling edge of the start bit. figure 27. individual read address operation 8.3.3.2.2.3 global write use the global write operation to write data to a specific register in multiple parts. the sequence of the communication is shown in figure 28 . data in this operation are written to the registers in all the devices from the first device to the address specified in the address field of the command and address phase. figure 28. global write operation 8.3.3.2.2.4 global read use the global read address operation to read the value of the register pointed to by the register pointer phase section. the daisy chain returns data starting from the address specified in the command or address phase, and ending with the address of the first device in the daisy chain. the data phase of the global read address operation is different from other address operations because the data phase consists of data read back from every device on the bus between the addressed device and first device, as shown in figure 29 . if the address specified exceeds the address of the last device, the operation halts and the bus times out after 35 ms. there is a delay of up to 1.5 baud before the devices respond back to the host. the host reads the data from the devices by synchronizing to the falling edge of the start bits. figure 29. global read operation 20 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1 calibration byte (55h) s p 1 1 a0 a1 a2 a3 a4 s p p0 p1 p2 p3 0 0 1 1 0 g/ni r/nw c/na command and address phase (a4:a0 = n) s p data byte 2 (from device n) d8 d9 d10 d11 d12 d13 d14 d15 s p data byte 1 (from device n) d0 d1 d2 d3 d4 d5 d6 d7 register pointer phase s p 1 0 1 0 1 1 0 0 7ms 1.5 bd 7ms 1.5 bd s p data byte 2 (from device n - 1) d8 d9 d10 d11 d12 d13 d14 d15 s p data byte 1 (from device n - 1) d0 d1 d2 d3 d4 d5 d6 d7 7ms s p data byte 2 (from device n - 2) d8 d9 d10 d11 d12 d13 d14 d15 s p data byte 1 (from device n - 2) d0 d1 d2 d3 d4 d5 d6 d7 7ms s p data byte 2 (from device 1) d8 d9 d10 d11 d12 d13 d14 d15 s p data byte 1 (from device 1) d0 d1 d2 d3 d4 d5 d6 d7 1.5 bd 1.5 bd 1 0 1 0 1 0 1 0 calibration byte (55h) s p 1 0 a0 a1 a2 a3 a4 s p p0 p1 p2 p3 0 0 1 1 0 g/ni r/nw c/na command and address phase s p data byte 2 d8 d9 d10 d11 d12 d13 d14 d15 s p data byte 1 d0 d1 d2 d3 d4 d5 d6 d7 register pointer phase p s p calibration byte (55h) s p 0 1 a0 a1 a2 a3 a4 0 g/ni r/nw c/na command and address phase s p data byte 2 d8 d9 d10 d11 d12 d13 d14 d15 s p data byte 1 d0 d1 d2 d3 d4 d5 d6 d7 s p 7ms 1.5 bd 1 0 1 0 1 0 1 0 s p p0 p1 p2 p3 0 1 0 1 register pointer phase
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8.4 device functional modes 8.4.1 continuous-conversion mode continuous conversion is the default operating mode for the tmp107-q1. in continuous-conversion mode, the tmp107-q1 continuously measures temperature (see table 6 ). after each temperature conversion, the temperature register updates with the conversion result, and the configuration register updates with the alert flags. 8.4.2 shutdown mode shutdown mode minimizes power dissipation because the tmp107-q1 shuts down all of the internal active circuitry except for those that are required to allow communication with the device. during shutdown mode, all registers can be read from or written to. to trigger a single temperature conversion in shutdown mode, issue a one-shot command (see the one-shot mode section for more details). when the conversion is complete, the tmp107-q1 returns to shutdown mode. 8.4.3 one-shot mode one-shot mode triggers single temperature measurements by writing a 1 to os (bit 12 in the configuration register ) when the device is in shutdown mode. following the completion of the single temperature conversion, the tmp107-q1 returns to shutdown mode. reading the os bit always results in a 0. use one-shot mode to achieve the lowest power consumption. for highest power savings and accuracy, do not communicate through the i/o bus during this mode. copyright ? 2015, texas instruments incorporated submit documentation feedback 21 product folder links: tmp107-q1
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 8.5 programming 8.5.1 eeprom the tmp107-q1 has an internal eeprom that is used to program and store values for writable registers, such as the configuration, high limit, and low limit registers. the eeprom also has eight, 16-bit locations of general- purpose memory. by programming the configuration register, the eeprom is used to store critical, system information, such as unique calibration information for the host, unique system serial id, or a user-specific conversion rate. during the reset event, the data from the eeprom are copied into the corresponding registers. two registers that are not updated by the eeprom are the temperature register and die identification register. the electrical and timing specifications for the eeprom are provided in the specifications section. see table 3 for the register map to the eight, internal eeprom locations (register addresses 6h to dh). 8.5.2 eeprom operations 8.5.2.1 eeprom unlock after power up, the eeprom is locked for programming by default. when locked, all writes to the eeprom are ignored. in order to program the eeprom, first unlock the memory for programming by writing logic 1 to nus (bit 0 in the temperature register ) using a regular write communication. eeprom locations are readable whether locked or unlocked. locking the eeprom by default is a protection provided to prevent unintentional triggering of eeprom programming during normal device operations. 8.5.2.2 eeprom lock if the eeprom is unlocked for programming, make sure to lock the eeprom after the programming operations. lock the eeprom by writing logic 0 to nus (bit 0 in the temperature register ). 8.5.2.3 eeprom programming after the eeprom is unlocked, a write to any eeprom-associated register triggers eeprom programming. a programming event takes up to 16 ms, depending on the device conditions; therefore, space out successive commands in 16-ms write periods. poll busy (bit 1 in the temperature register ) to check the eeprom programming status. the busy bit = 1 when the eeprom program is in progress. the busy bit = 0 after programming is complete and the eeprom is ready for another program operation. while the eeprom is being programmed, writes to every other register are prevented in order to protect device data from corruption until programming is complete. when the global write operation is issued to program the eeprom locations, all of the devices in the daisy chain specified within the address field perform the programming simultaneously. this simultaneous programming leads to an increase in current in the supply wire of the daisy chain, and may create a drop in the supply voltage. it is important to maintain the supply voltage at greater than 1.8 v during the eeprom programming in order to program devices in the daisy chain. 8.5.2.4 eeprom acquire or read the eeprom locations that store the power-on reset values of the registers are automatically loaded into the corresponding registers at reset. the general-purpose eeprom locations are readable even when the eeprom is locked. while a read is performed on an eeprom location in the register map, there is a slightly longer delay in the stop bit (~100 s) between the pointer phase and the phase data in the communication in order to allow the eeprom to be read. the standard uart protocol allows for such delays when the uart transceiver is being used. the amount of current consumption from the eeprom read is negligible compared to the current consumption from communication. 22 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8.6 register map figure 30 shows the internal register structure of the tmp107-q1. figure 30. register structure table 3 describes the registers available with their addresses, followed by the description of the bits in each register. all register default values (except for the temperature register and die id register) can be modified by writing to the eeprom. all reset values listed are the factory-default values. table 3. register map and pointer addresses address p3 p2 p1 p0 register name (hex) 0 0 0 0 0h temperature register 0 0 0 1 1h configuration register 0 0 1 0 2h high limit 1 0 0 1 1 3h low limit 1 0 1 0 0 4h high limit 2 0 1 0 1 5h low limit 2 0 1 1 0 6h eeprom 1 register 0 1 1 1 7h eeprom 2 register 1 0 0 0 8h eeprom 3 register 1 0 0 1 9h eeprom 4 register 1 0 1 0 ah eeprom 5 register 1 0 1 1 bh eeprom 6 register 1 1 0 0 ch eeprom 7 register 1 1 0 1 dh eeprom 8 register 1 1 1 1 fh die identification (read only) copyright ? 2015, texas instruments incorporated submit documentation feedback 23 product folder links: tmp107-q1 command and register pointer temperature register configuration and limit registers eeprom i/o control interface i/o1 i/o2
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 8.6.1 temperature register (address = 0h) [reset = 0h] the temperature register of the tmp107-q1 is configured as a 16-bit register that stores the output of the most recent conversion and two status bits. two bytes must be read to obtain data, and they are described in figure 31 . the upper 14 bits are used to indicate temperature. one lsb equals 0.015625 c. the temperature is represented in binary twos complement format. following power-up or reset, the temperature register reads 0 c until the first conversion is complete. the remaining two bits indicate the eeprom status. when the eeprom is locked, the eeprom cannot be programmed and all writes to the eeprom addresses are ignored. by default, the eeprom is locked for programming at power-on reset and must be unlocked in order to be programmed. figure 31. temperature register 15 14 13 12 11 10 9 8 t13 t12 t11 t10 t9 t8 t7 t6 r-0h 7 6 5 4 3 2 1 0 t5 t4 t3 t2 t1 t0 busy nus r-0h r-0h r/w-0h legend: r/w = read/write; r = read only; -n = value after reset table 4. temperature register field descriptions bit field type reset description 15-2 t13-t0 r 0h temperature result (resolution of 0.015625 c). range: ? 128 c to +128 c. 1 busy r 0h this bit indicates the status of the eeprom. 0: indicates that the eeprom is ready; the eeprom has finished the last transaction and is ready to accept new commands. 1: indicates that the eeprom is busy completing a command and must not be given more commands. any new commands given to the eeprom are ignored by the eeprom controller. 0 nus r/w 0h eeprom unlock state. 0: eeprom locations are locked for programming. 1: eeprom locations are unlocked for programming. 24 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8.6.2 configuration register (address = 1h) [reset = a000h] the configuration register is a read and write register used to store bits that control the part operation. the format and power-up or reset value of the configuration register for the tmp107-q1 is shown in figure 32 and table 5 . when the nus bit is 0, all writes to this register are stored in register logic. when nus is 1, then all writes to this register program the eeprom location that stores the configuration bits. writes to this location are followed by a 16-ms wait period for programming the eeprom. when the configuration register is written, the current conversion is aborted and new action is taken based on the new written bits. thus, if the tmp107-q1 is put into shutdown, the device goes into shutdown immediately. if the conversion rate is changed, any ongoing conversion is aborted and a new conversion starts with the new conversion rate. figure 32. configuration register 15 14 13 12 11 10 9 8 cr2 cr1 cr0 os sd fh1 fl1 t1/ a1 r/w-5h r/w-0h r/w-0h r-0h r-0h r/w-0h 7 6 5 4 3 2 1 0 pol1 fh2 fl2 t2/ a2 pol2 reserved rst reserved r/w-0h r-0h r-0h r/w-0h r/w-0h r-0h w-0h r-0h legend: r/w = read/write; r = read only; w = write only; -n = value after reset table 5. configuration register field descriptions bit field type reset description 15-13 cr2-cr0 r/w 5h conversion rate. the conversion rate bits control the update rate of the analog-to-digital converter (adc). table 6 describes the relationship between the values of the conversion rate bits and the corresponding conversion time and average quiescent current. these bits only affect continuous-conversion mode and not one-shot mode. 12 os r/w 0h one-shot mode. 0: default. 1: starts a single temperature conversion if the sd bit is set to 1. the tmp107-q1 returns to the shutdown state at the completion of the single conversion. when the configuration register is read, os always reads zero. 11 sd r/w 0h shutdown mode. 0: the tmp107-q1 is in continuous-conversion mode. 1: the tmp107-q1 is in shutdown mode. initiate a conversion by writing a 1 to the os bit. 10 fh1 r 0h high limit 1 flag. 0: indicates that the temperature result does not exceed high limit 1. 1: indicates when the temperature result exceeds high limit 1. 9 fl1 r 0h low limit 1 flag. in therm mode, this bit is not used and always reads 0. 0: in alert mode, this bit indicates that the temperature result is greater than low limit 1. 1: in alert mode, this bit indicates when the temperature result is less than low limit 1. 8 t1/ a1 r/w 0h alert and therm mode 1. 0: alert mode: in this mode, the high limit 1 and low limit 1 form a window. if the temperature result is greater than high limit 1 or less than low limit 1, the respective flag (either fh1 or fl1) is asserted. after the flag is asserted, clear the flag by reading the configuration register. 1: therm mode: in this mode, the limits are used to form an upper limit threshold detector. if the temperature result is greater than high limit 1, the fh1 flag is asserted. the fh1 flag is then deasserted only after the temperature drops below low limit 1. in therm mode, only the fh1 flag is active. the fl1 flag always reads 0. in this mode, the flags are asserted and deasserted only at the end of a conversion and cannot be cleared by a configuration register read. 7 pol1 r/w 0h 0: polarity of the alert1 pin is active low. 1: polarity of the alert1 pin is active high. 6 fh2 r 0h high limit 2 flag. 0: indicates that the temperature result does not exceed high limit 2. 1: indicates when the temperature result exceeds high limit 2. 5 fl2 r 0h low limit 2 flag. in therm mode, this bit is not used and always reads 0. 0: in alert mode, this bit indicates that the temperature result is greater than low limit 2. 1: in alert mode, this bit indicates when the temperature result is less than low limit 2. copyright ? 2015, texas instruments incorporated submit documentation feedback 25 product folder links: tmp107-q1
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com table 5. configuration register field descriptions (continued) bit field type reset description 4 t2/ a2 r/w 0h alert and therm mode 2. 0: alert mode: in this mode, the high limit 2 and low limit 2 form a window. if the temperature result is greater than high limit 2 or less than low limit 2, the respective flag (either fh2 or fl2) is asserted. after the flag is asserted, clear the flag by reading the configuration register. 1: therm mode: in this mode, the limits are used to form an upper limit threshold detector. if the temperature result is greater than high limit 2, the fh2 flag is asserted. the fh2 flag is then deasserted only after the temperature drops below low limit 2. in therm mode, only the fh2 flag is active. the fl2 flag always reads 0. in this mode, the flags are asserted and deasserted only at the end of a conversion and cannot be cleared by a configuration register read. 3 pol2 r/w 0h 0: polarity of the alert2 pin is active low. 1: polarity of the alert2 pin is active high. 2 reserved r 0h reserved 1 rst w 0h software reset. 0: default. 1: reset. this bit is a write-only bit and is used to perform a software reset on the tmp107-q1. 0 reserved r/w 0h reserved table 6. conversion rates conversion conversions per average i q cr2 cr1 cr0 period second (v+ = 3.3 v) 0 0 0 15 ms 62 200 a 0 0 1 50 ms 20 20 a 0 1 0 100 ms 10 15 a 0 1 1 250 ms 4 11 a 1 0 0 500 ms 2 9 a 1 0 1 1 s (default) 1 (default) 7 a 1 1 0 4 s 0.25 6 a 1 1 1 16 s 0.0625 5 a 26 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 8.6.3 high limit 1 register (address = 2h) [reset = 7ffch] figure 33. high limit 1 register 15 14 13 12 11 10 9 8 th1_13 th1_12 th1_11 th1_10 th1_9 th1_8 th1_7 th1_6 r/w-7fh 7 6 5 4 3 2 1 0 th1_5 th1_4 th1_3 th1_2 th1_1 th1_0 reserved r/w-3fh r-0h legend: r/w = read/write; r = read only; -n = value after reset table 7. high limit 1 register field descriptions bit field type reset description 15-2 th1_13-th1_0 r/w 1fffh high limit for alert function 1. resolution is 0.015625 c. data is in twos complement form. 1-0 reserved r 0h reserved 8.6.4 low limit 1 register (address = 3h) [reset = 8000h] figure 34. low limit 1 register 15 14 13 12 11 10 9 8 tl1_13 tl1_12 tl1_11 tl1_10 tl1_9 tl1_8 tl1_7 tl1_6 r/w-80h 7 6 5 4 3 2 1 0 tl1_5 tl1_4 tl1_3 tl1_2 tl1_1 tl1_0 reserved r/w-0h r-0h legend: r/w = read/write; r = read only; -n = value after reset table 8. low limit 1 register field descriptions bit field type reset description 15-2 tl1_13-t1_l0 r/w 2000h low limit for alert function 1. resolution is 0.015625 c. data is in twos complement form. 1-0 reserved r 0h reserved 8.6.5 high limit 2 register (address = 4h) [reset = 7ffch] figure 35. high limit 2 register 15 14 13 12 11 10 9 8 th2_13 th2_12 th2_11 th2_10 th2_9 th2_8 th2_7 th2_6 r/w-7fh 7 6 5 4 3 2 1 0 th2_5 th2_4 th2_3 th2_2 th2_1 th2_0 reserved r/w-3fh r-0h legend: r/w = read/write; r = read only; -n = value after reset table 9. high limit 2 register field descriptions bit field type reset description 15-2 th2_13-th2_0 r/w 1fffh high limit for alert function 2. resolution is 0.015625 c. data is in twos complement form. 1-0 reserved r 0h reserved copyright ? 2015, texas instruments incorporated submit documentation feedback 27 product folder links: tmp107-q1
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 8.6.6 low limit 2 register (address = 5h) [reset = 8000h] figure 36. low limit 2 register 15 14 13 12 11 10 9 8 tl2_13 tl2_12 tl2_11 tl2_10 tl2_9 tl2_8 tl2_7 tl2_6 r/w-80h 7 6 5 4 3 2 1 0 tl2_5 tl2_4 tl2_3 tl2_2 tl2_1 tl2_0 reserved r/w-0h r-0h legend: r/w = read/write; r = read only; -n = value after reset table 10. low limit 2 register field descriptions bit field type reset description 15-2 tl2_13-tl2_0 r/w 2000h low limit for alert function 2. resolution is 0.015625 c. data is in twos complement form. 1-0 reserved r 0h reserved 8.6.7 eeprom n register (where n = 1 to 8) (addresses = 6h to dh) [reset = 0h] figure 37. eeprom register 15 14 13 12 11 10 9 8 ee n _15 ee n _14 ee n _13 ee n _12 ee n _11 ee n _10 ee n _9 ee n _8 r/w-0h 7 6 5 4 3 2 1 0 ee n _7 ee n _6 ee n _5 ee n _4 ee n _3 ee n _2 ee n _1 ee n _0 r/w-0h legend: r/w = read/write; -n = value after reset table 11. eeprom register bits bit field type reset description 15-8 ee n _15-ee n _0 r/w 0h 16-bit programable eeprom. only available for programming when nus (bit 0 in the temperature register ) is set to 1. writes to this location with the nus bit set to 0 are ignored. 8.6.8 die id register (address = fh) [reset = 1107h] figure 38. die id register 15 14 13 12 11 10 9 8 d15 d14 d13 d12 d11 d10 d9 d8 r-11h 7 6 5 4 3 2 1 0 d7 d6 d5 d4 d3 d2 d1 d0 r-07h legend: r = read only; -n = value after reset table 12. die id register field descriptions bit field type reset description 15-0 d15 - d0 r 1107h the die id register is a read-only register. 28 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 9 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 9.1 application information the tmp107-q1 is a digital temperature sensor that is optimal for thermal monitoring of large areas and over long distances between the host and the sensors. the smaart-wire interface of the tmp107-q1 allows for data transfer over a single wire at distances of up to 1000 feet (300 meters) between consecutive devices in the chain. 9.2 typical applications 9.2.1 connecting multiple devices figure 39 shows typical connections for tmp107-q1 devices in a daisy-chain configuration. note: bold resistors represent wire resistance. figure 39. connecting multiple devices 9.2.1.1 design requirements to avoid any bus contention between the host and the tmp107-q1 devices, use a tri-state buffer, such as the sn74lvc1g125 . use a 100- resistor (typical) in series with the rx input to limit the amount of current in case of overshoot. a 10- resistor (typical) between the tri-state buffer and the first tmp107-q1 device reduces any signal collisions between the buffer and the tmp107-q1 by limiting the amount of current flow. the pullup resistor at the output of the tri-state buffer defines the baud rate of communication. use a 4.1-k pullup resistor, as shown in figure 39 , to support the entire baud rate range specified in the timing requirements . a 0.1- f bypass capacitor is recommended for each tmp107-q1 device in the daisy-chain. copyright ? 2015, texas instruments incorporated submit documentation feedback 29 product folder links: tmp107-q1 gnd v+ i/o1 7 1 i/o2 3 5 sensor 1 r1 alert1 r2 alert2 tmp107 tx rx uart 100 4.1 k 10 1.7 v to 5.5 v 2 6 8 4 v+ gnd sensor 2 tmp107 sensor n tmp107 gnd v+ i/o1 i/o2 r1 alert1 r2 alert2 gnd v+ i/o1 i/o2 r1 alert1 r2 alert2 0.1 f 0.1 f 0.1 f 0.1 f mcu 7 13 5 2 6 8 4 7 13 5 2 6 8 4
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com typical applications (continued) 9.2.1.2 detailed design procedure multiple devices are connected with cables in this typical application. the maximum cable length between two tmp107-q1 devices can vary because of the effective resistance and capacitance of the type of cable used in a customer application. 9.2.1.2.1 voltage drop effect take into account the voltage drop that occurs along the supply and ground lines as a result of the currents of all the devices on the line. this voltage drop occurs as a result of multiple devices simultaneously consuming current through the combined resistance of the common wire, connectors, and solder contacts. make sure that the supply on the last device does not fall below the minimum operating supply of 1.7 v during any mode of operation, or below 1.8 v during eeprom programming and chain initialization. 9.2.1.2.2 eeprom programming current another parameter to consider is the eeprom programming current. the device consumes higher current during eeprom programming than during regular operation, as specified in the electrical characteristics section. this higher current consumption results in a larger voltage drop along the supply and ground lines and may lead to similar issues as mentioned previously. to avoid large, simultaneous, programming currents from multiple devices, program the eeprom on the devices using the individual write commands instead of the global write commands. 9.2.1.2.3 power savings in continuous-conversion mode, the tmp107-q1 continuously measures temperature and consumes the most power out of any of the operating modes. for maximum power savings, place the tmp107-q1 in shutdown mode. in shutdown mode, the tmp107-q1 shuts down all internal active circuitry except for the required circuit elements that allow communication with the device. issue a one-shot command when in shutdown mode to trigger a single temperature measurement. 9.2.1.2.4 accuracy in order to achieve the best temperature accuracy when multiple devices are connected in the daisy-chain, configure the devices in shutdown mode, and then issue a one-shot conversion. read the temperature from all devices on the bus by issuing a global read after a delay of 20 ms. this delay after the one-shot command makes sure the internal adc conversion is finished, and the voltages of the supply bypass capacitors over the daisy chain are stable, before the data are read by the host. 9.2.1.2.5 electromagnetic interference (emi) the typical, three-conductor tmp107-q1 measurement chain is fairly insensitive to electromagnetic distortions because the supply, ground and signal wires are running in parallel and located in the same cable housing. to help maintain this insensitivity, do not make any additional electric connections at intermediate nodes in the cable, or at the end of the chain of tmp107-q1 devices. there can be environmental effects on a tmp107-q1 cable implementation in the form of conducted emission. the conducted susceptibility of the cable can be investigated if this is a suspected source of interference. designing for electromagnetic compatibility with the intended operating environment can mitigate interference. there can be radiated emission from the tmp107-q1 cable implementation that may affect the radiated susceptibility of surrounding equipment. see specification iec61000-4-3: testing and measurement techniques - radiated, radio-frequency, electromagnetic field immunity test for more information on testing for radiated immunity to signals in the 80-mhz to 6-ghz range. also, see iec61000-4-6: testing and measurement techniques - immunity to conducted disturbances, induced by radio-frequency fields for information on testing for conducted immunity in the 9-khz to 80-mhz range. 30 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 typical applications (continued) physical shielding and electrical filtering can mitigate much of the interference into and out of the surrounding environment and electronics. see iec62153-4-x: metallic communication cable test methods for information on determining the screening effectiveness of a metallic cable shield. the thermal conductivity of additional material around the cable implementation can affect the settling time of the tmp107-q1 at its position in the cable. this thermal conductivity can also reduce the allowable temperature range exposure of the cable implementation depending on the materials chosen. generally, passive electrical filtering is very effective at suppressing conducted interference. circuit board components, such as an emi filter that increases in resistance significantly in response to higher frequency content, are widely available and often easy to implement. even simple rc and lc filter configurations on transmission lines provide some immunity. 9.2.1.3 application curves figure 40 shows the step response of the tmp107-q1 to a submersion in an oil bath of 100 o c from room temperature (24 o c) at a 3.3-v supply. the time-constant, or the time for the output to reach 63% of the input step, is 1.375 s. the time-constant depends on the printed circuit board (pcb) that the device is mounted on. for this test, the device is soldered to a two-layer pcb that measures 0.551 in 0.748 in. figure 41 shows the tmp107-q1 eye diagram as a measure of quality for the transmission path (cable). measurement of eye patterns is performed by a setup where a source generates a known bit stream that is fed into a transmission channel. the eye diagram of tmp107-q1 is taken on the i/o line at the far end of a 300- meter cable connecting two tmp107-q1 devices. the baud rate is 9600 kbps, and the supply voltage is set to 3.3 v. the scope is set to trigger on i/o rising (or falling) edge, with an infinite persistent time. the superimposed, captured waveforms create the eye diagram. excellent eye diagram parameters are maintained at 9600 kbps speed. figure 41. tmp107-q1 eye diagram figure 40. temperature step response copyright ? 2015, texas instruments incorporated submit documentation feedback 31 product folder links: tmp107-q1 time (s) temperature ( q c) -1 0 1 2 3 4 5 6 7 8 9 10 11 20 28 36 44 52 60 68 76 84 92 100 d001
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com typical applications (continued) 9.2.2 connecting alert1 and alert2 pins as described in the alert1, alert2, r1, and r2 pins section, the tmp107-q1 contains internal 100-k pullup resistors connected between pins alert1 and r1, and pins alert2 and r2. connect r1 and r2 to v+ in order to enable the internal pullup resistors. figure 42 shows a schematic example of how to connect these pins for multiple tmp107-q1 devices in a daisy-chain configuration. figure 42. connecting alert1 and alert2 pins 9.2.3 alert1 and alert2 pins used as general-purpose output (gpo) the tmp107-q1 alert pins are also used as a gpo to control external switches or leds. this feature is useful in applications wherein the wiring between general-purpose output lines from the microcontroller or host to a control switch or led can be eliminated by communicating through the i/o pins of tmp107-q1. to configure the alert x pins as a gpo, program the high-limit register to the highest temperature (7ffch) and the low-limit register to the lowest temperature (8000h). this programming disables the alert x pins from performing high- and low-limit temperature controls. the configuration register polarity bits (pol1 and pol2) are used to toggle the alert x pin output. the alert x pins are open-drain outputs; therefore, make sure the r1 and r2 pins are connected to the supply voltage, as shown in figure 43 . figure 43. alert1 and alert2 pins used as general-purpose output 32 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1 gnd v+ i/o1 i/o2 sensor 1 r1 alert1 r2 alert2 tmp107 tx rx uart 100 4.1 k 10 1.7 v to 5.5 v v+ gnd 7 13 5 sensor 2 tmp107 2 6 8 4 gnd v+ i/o1 i/o2 r1 alert1 r2 alert2 0.1 f mcu 7 13 5 2 6 8 4 switch / control / led switch / control / led gnd v+ i/o1 7 1 i/o2 3 5 sensor 1 r1 alert1 r2 alert2 tmp107 tx rx uart 100 4.1 k 10 1.7 v to 5.5 v 2 6 8 4 v+ gnd sensor 2 tmp107 sensor n tmp107 gnd v+ i/o1 i/o2 r1 alert1 r2 alert2 gnd v+ i/o1 i/o2 r1 alert1 r2 alert2 alert1 alert2 int2 int1 mcu 7 13 5 2 6 8 4 7 13 5 2 6 8 4
tmp107-q1 www.ti.com sbos726a ? october 2015 ? revised october 2015 10 power supply recommendations the tmp107-q1 device operates with a power supply in the range of 1.7 v to 5.5 v. the device is optimized for operation at a 3.3-v supply, but measures temperature accurately for the full supply range. for best performance, use a 0.1- f power-supply bypass capacitor. place the bypass capacitor as close as possible to the supply and ground pins of the device. applications with noisy or high-impedance power supplies may require additional bypass capacitors to reject power-supply noise. 11 layout 11.1 layout guidelines mount the tmp107-q1 to a pcb as shown in figure 44 . obtaining acceptable performance with alternate layout schemes is possible, however this layout produces good results and is intended as a guideline. ? bypass the v+ pin to ground with a low-esr ceramic bypass-capacitor. the typical recommended bypass capacitance is a 0.1- f ceramic capacitor with a x5r or x7r dielectric. the optimum placement is closest to the v+ and gnd pins of the device. take care to minimize the loop area formed by the bypass-capacitor connection, the v+ pin, and the gnd pin of the ic. ? use larger copper area pads to reduce self-heating and lower thermal resistance to the environment. ? if possible, use pcb boards with thick copper layers. ? if possible, do not use stain to protect the ic because stain can increase thermal resistance. 11.2 layout example figure 44. layout example copyright ? 2015, texas instruments incorporated submit documentation feedback 33 product folder links: tmp107-q1 supply bypass capacitor v+ r1 alert2 i/o2 r2 alert1 gnd i/o1 gnd i/o2 gnd i/o1 v+ tmp107 pcb border capacitor v+
tmp107-q1 sbos726a ? october 2015 ? revised october 2015 www.ti.com 12 device and documentation support 12.1 documentation support 12.1.1 related documentation ? tmp107evm user's guide, sbou158 ? sn74lvc1g125 data sheet, sces223 12.2 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 12.3 trademarks uart-compatible, smaart wire, e2e are trademarks of texas instruments. all other trademarks are the property of their respective owners. 12.4 electrostatic discharge caution this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.5 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 13 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation. 34 submit documentation feedback copyright ? 2015, texas instruments incorporated product folder links: tmp107-q1
package option addendum www.ti.com 27-oct-2015 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples TMP107BQDQ1 active soic d 8 75 green (rohs & no sb/br) cu nipdau-dcc level-2-260c-1 year -40 to 125 t107bq tmp107bqdrq1 active soic d 8 2500 green (rohs & no sb/br) cu nipdau-dcc level-2-260c-1 year -40 to 125 t107bq (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release.
package option addendum www.ti.com 27-oct-2015 addendum-page 2 in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of tmp107-q1 : ? catalog: tmp107 note: qualified version definitions: ? catalog - ti's standard catalog product

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